High-Speed, Low Noise Analog-to-Digital Converters

pHigh-speed ADCs are key components of modern radio and radar systems. However, the drive to carry out more and more of the associated signal processing in the digital domain, i.e. after the ADC, puts increasingly stringent demands on ADC performance. The main goal of this project is to develop new architectures for high-speed ADCs in advanced CMOS processes, which should achieve wide BW (100s of MHz) without compromising their linearity and resolution (noise), while still consuming reasonable amounts ( 1W) of power. The project will be carried out by researchers from the TU Delft and from NXP Semiconductors./p


Projectnummer PPS-toeslag Onderzoek en Innovatie_2021_343
Rijksbijdrage € 152.000,00
Jaar 2021
Subsidieregeling PPS-toeslag Onderzoek en Innovatie
Partners NXP Semiconductors Netherlands B.V.
Aanvrager Technische Universiteit Delft